The goal of this project is the exploration and systematic characterization of die-level process technologies to enable chip-to-chip (C2C) integration of heterogeneous 3D systems using post-fabricated copper through-silicon-vias (TSVs). The subject matter is timely and highly relevant for a number of domains including wearable/implanted systems and ambient/environmental systems, where several different species of chips (dies) need to be integrated together with the smallest-possible form factor, in order to reduce system volume/weight and to allow extreme miniaturization for completely novel applications. [read on]
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